宽带低噪声放大器设计

论文总字数：31348字

摘 要

本文的研究目标在于设计一种宽带低噪声放大器（LNA），具备适当的增益和1GHz以上的3dB带宽（BW），噪声系数（NF）小于4dB，并消耗尽可能低的功耗，电路设计完成后选择适当的软件工艺实现仿真，测量所设计LNA的性能指标。

所设计的LNA使用共栅(CG)NMOS和PMOS晶体管作为互补电流复用结构的输入设备，使用NMOS晶体管实现有源负载的并联反馈，反馈级的电流也被输入晶体管重复使用，以提高LNA的电流效率，并对反馈晶体管实施前向体偏置（FBB）来调谐反馈系数，从而调谐LNA的输入匹配度和增益。LNA的输出经NMOS晶体管构成的输出缓冲器输出。本文创新性地运用互补电流复用架构CG CMOS LNA的交流耦合，设计出一种输入设备中NMOS晶体管和PMOS晶体管相互的噪声消除机制，实现了低噪声。

最后，使用Cadence virtuoso软件的TSMC40nm工艺实现仿真，测量得LNA具备13.5dB增益，3.1dB最小噪声系数，输入匹配度S11为-20dB，LNA的带宽为0.1-2.2GHz，在1.2V电源电压下仅消耗0.72mW的功耗。

关键词：互补电流复用，前向体偏置，可调谐有源并联反馈，CMOS LNA

Abstract

This paper aims at researching and designing a low-noise amplifier(LNA), which features a moderate gain, a 3dB bandwidth(BW) above 1GHz, a noise figure(NF) below 4dB and a power consumption as low as possible. The proposed LNA is implemented by choosing appropriate software technology to simulate after being designed, then its performance indexes are going to be measured.

The proposed LNA uses common-gate(CG) NMOS and PMOS transistors as input devices in a complementary current-reuse structure and uses a NMOS transistor to achieve the shunt-feedback of active load. The current of the feedback stage is also reused by the input transistors to improve the current efficiency of the LNA. A forward body biasing(FBB) is employed to tune the feedback coefficient, leading to tuning the input matching and gain of the LNA. The output of the LNA is outputted through the output buffer made of a NMOS transistor. This paper innovatively exploits the ac couple of the CG CMOS LNA in a complementary current-reuse structure, creating a mutual noise-cancellation mechanism for the NMOS and PMOS transistors in the input devices which allows low noise.

Eventually, using TSMC40nm technology in Cadence virtuoso to simulate. The measured LNA has a 13.5dB gain, 3.1dB minimum NF, input matching S11 at -20dB and 0.1-2.2GHz BW, while consuming only 0.72mW power from a 1.2-V supply.

KEY WORDS: complementary current-reuse, forward body bias, tunable active shunt-feedback, CMOS LNA

目 录

摘要 ………………………………………………………………………………………………Ⅰ

Abstract …………………………………………………………………………………………Ⅱ

1. 绪论 .…………………………………………………………………………………....1

1.1 研究背景与意义…………………………………………………............1

1.2 低噪声放大器发展概况………………………………………………....2

1.3 本文的研究目标和主要工作…………………………………………....4

第二章 宽带低噪声放大器综述…………………………………………………......5

2.1 宽带低噪声放大器的基本理论…………………………………...........5

2.1.1 散射参数……………………………………………………..…...5

2.1.2 噪声…………………………………………………….……..…..6

2.1.3 放大器的增益…………………………………………………….8

2.1.4 放大器的线性度………………………………………………….8

2.1.5 放大器的稳定性………………………………………………….10

2.1.6 放大器的带宽…………………………………………………….11

2.1.7 宽带低噪声放大器的结构……………………………………….12

2.2 CMOS放大器的基本理论………………………………………….......13

2.2.1 CMOS器件大信号模型………………………………………….13

2.2.2 CMOS器件小信号模型………………………………………….14

第三章 宽带低噪声放大器设计.……………………………………………………..16

3.1 整体电路设计……………………………………………………………16

3.2 改进原理与效果分析……………………………………………………18

3.2.1 输入匹配…………………………………………………………...18

3.2.2 电压增益…………………………………………………………...19

3.2.3 噪声系数和带宽…………………………………………………...20

3.3 偏置电路设计……………………………………………………………22

第四章 LNA仿真和结果测量………………………………………………………..26

第五章 总结与展望…………………………………………………………………....29

参考文献（References）……………………………………………………………...30

致谢………………………………………………………………………………….....30

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