论文总字数：27096字

摘 要

随着CMOS集成电路工艺的不断发展，现在集成电路设计已经进入片上系统阶段，作为充当片上系统的时钟源，锁相环的重要性不言而喻。电荷泵是锁相环系统中常用的模块，因为采用电荷泵的锁相环具有捕获时间短、捕获范围广、锁定状态相位误差低等优点。同时电荷泵有如下的性能指标：电流失配率、时钟馈通、功耗等，这些指标与整个锁相环的稳定与否息息相关。而在这当中，电流失配往往是我们关注的重点，因为电流失配现象会导致电荷泵及锁相环的性能严重下降。例如它会引起本振的杂散，在小数调制器中会引入非线性从而造成相噪的恶化。因此充放电电流匹配是本论文重点要解决的问题。

基于SMIC 0.18μm工艺，使用Cadence软件设计了一种低失配、低功耗、输出电压摆幅大的电荷泵电路。通过对开关接源极单端电荷泵、开关接漏极单端电荷泵、开关接栅极单端电荷泵三种传统电荷泵对比分析，最终选择了开关接源极单端电荷泵，以此为基础通过引用反馈管来减小电流失配，同时增添与开关管互补的晶体管提高开关速度，这样做减小了芯片面积，同时保证了电路结构不会很复杂，使得功耗降低。

使用Cadence的Spectre对电路进行仿真，工作电压为1.8V，在电流镜提供基准电流为50μA的情况下，当电荷泵输出电压在0.4V到1.25V之间时，电流失配率最大仅为1.94%，电荷泵输出电压摆幅为850mV，功耗为0.18mW。

关键词：电荷泵，电流失配，低功耗

Abstract

With the continuous development of CMOS integrated circuit technology, integrated circuit design has entered the stage of system-on-chip. As the clock source of the system-on-chip, the importance of the phase-locked loop is self-evident. The charge pump is a commonly used module in a phase-locked loop system because a phase-locked loop using a charge pump has the advantages of short acquisition time, wide capture range, and low phase error in the locked state. At the same time, the charge pump has the following performance indicators: current mismatch rate, clock feedthrough, power consumption, etc. These indicators are closely related to the stability of the entire PLL. Among these, the current mismatch is often the focus of our attention, because the current mismatch phenomenon will lead to a serious decline in the performance of the charge pump and phase-locked loop. For example, it will cause local oscillator spurs, introduce nonlinearity in the decimal modulator and cause phase noise to deteriorate. Therefore, the charge-discharge current matching is the key problem to be solved in this thesis.

Based on the SMIC 0.18μm process, a low-match, low-power, and large-output-voltage charge-pump circuit was designed using Cadence software. By comparing and analyzing the three sources of single-ended charge pump, single-ended drain charge pump and single charge charge pump, the switch source is finally selected as the single-ended charge pump. Based on the reference feedback tube to reduce the current mismatch, while increasing the switching speed by adding transistors complementary to the switch tube, this reduces the chip area, while ensuring that the circuit structure will not be very complicated, resulting in reduced power consumption.

Using Cadence's Spectre to simulate the circuit, the operating voltage is 1.8V. When the current mirror provides a reference current of 50μA, when the charge pump output voltage is between 0.4V and 1.25V, the maximum current mismatch rate is only 1.94%, the charge pump output voltage swing is 850mV and the power dissipation is 0.18mW.

KEY WORDS : charge pump ,current mismatch, low power consumption

目 录

摘要 I

Abstract II

第一章 绪论 1

1.1 引言 1

1.2 锁相环介绍及分类 1

1.3 电荷泵与锁相环的关系 2

1.4 研究的内容及目的 3

第二章 锁相环的基本组成模块 4

2.1 鉴频鉴相器(PFD) 4

2.2 环路滤波器(LPF) 6

2.3 压控振荡器(VCO) 8

2.4 分频器(DIV) 10

第三章 电荷泵的工作原理与特性分析 12

3.1 电荷泵的工作原理 12

3.2 三种单端电荷泵的对比与分析 13

3.2.1 开关接漏极单端电荷泵 14

3.2.2 开关接栅极单端电荷泵 15

3.2.3 开关接源极单端电荷泵 15

第四章 电荷泵电路设计及其仿真 17

4.1 电荷泵中的非理想因素分析 17

4.1.1 电荷共享 17

4.1.2 电流泄露 18

4.1.3 电流失配 19

4.1.4 时钟馈通和电荷注入效应 20

4.2 电荷泵的设计与改进 21

4.3 电荷泵的仿真 24

4.3.1 电流失配仿真 24

4.3.2 电荷泵的充电仿真与放电仿真 27

第五章 总结与展望 31

5.1 设计总结 31

5.2 后续工作展望 31

致谢 32

参考文献 33

第一章 绪论

• 1. 引言

在2.4G低功耗蓝牙收发机频率合成器中，锁相环（Phase Locked Loop，PLL）是其中的关键环节。下图为一采用PPL技术的频率合成器方框图。

图1-1 采用PPL技术的频率合成器方框图

剩余内容已隐藏，请支付后下载全文，论文总字数：27096字