论文总字数：28043字

摘 要

光子探测技术正经历着一代代的革新，目标实现更高的灵敏度、更高的精度、更小的误差以及更低的功耗等。由于光子在宽动态范围内入射，固定位数计数会造成较大的功耗；单光子雪崩二极管SiC APD作为探测光子的最重要元件，其物理特性也会造成暗计数影响探测精度。本文设计计数位数可调的光子计数读出电路，旨在降低功耗并提高探测精度。

本文基于单光子雪崩二极管设计光子计数读出电路的系统框架和时序逻辑，并且在计数器和存储器的电路设计中，加入2位计数位数控制信号，以控制计数器和存储器在不同的光子环境中，按4、6、8或10位进行光子计数及输出，使弱光条件下计数器和存储器的高位不工作，节省了计数功耗与数据传输功耗，最多可节省约60%功耗。

此外，由于单光子雪崩二极管的热效应会产生暗计数，光子信号延迟时间短会接收大量的暗计数，长则会造成漏计数。本文使用Matlab进行光子计数模拟，对光子频率10kHz~500kHz下的不同延迟时间进行模拟，得到不同光子频率下的探测准确率最高时的延迟时间作为该光子频率下的“最佳延迟时间”，并进行回归分析及拟合，得到“光子频率-最佳延迟时间”的连续函数，为2项指数函数。让FPGA通过该函数控制读出电路的hold-off time延迟时间，来平衡暗计数和漏计数，使检测准确度达到提升。通过模拟得到的平均准确率为98.24%。

关键词：光子计数，位数可调，暗计数，延迟时间可调

Abstract

Photon detection technology has undergone generations of innovations, with the goal of achieving higher sensitivity, higher accuracy, smaller detection errors, and lower power consumption. Due to the photons in a wide dynamic range, greater power consumption will be caused if the number of counting bits is fixed. Additionally, the single photon avalanche diode SiC APD is the most important part for detecting photons. Its physical characteristics will also cause dark counts to affect the detection accuracy. In this paper, a photon counting readout integrated circuit with adjustable counting bits is designed to reduce power consumption and improve detection accuracy.

Based on the single photon avalanche diode, a framework and timing logic design for the photon counting readout integrated circuit system is designed in this paper. In the circuit design of counter and memory, 2 control signals are added to alter the counting bits of the counter and memory in different photonic environment. The number of bits for photon counting and output can be changed to 4, 6, 8 or 10, in order to make the counter and memory’s higher bits not work if in low-light conditions. In this way to save power consumption in counting and data transmission. It can be reduced by at most 60%.

In addition, dark counts, caused by thermal generation or tunneling effect within the diode, will largely be taken into count if the hold-off time is too short, and numbers of counts will be missed if the hold-off time is too long. To tackle this problem, Matlab is used for photon counting simulation. Procedures for different delay times at certain photon frequency ranged from 10 kHz to 500 kHz are simulated to obtain the delay time when the detection accuracy is highest at certain photon frequency. The delay time obtained is called “optimal delay time” at certain photon frequency. After regression analysis and fitting, a continuous function of "photon frequency—optimal delay time" is obtained, which is a 2-term exponential function. The FPGA controls the hold-off time delay of the readout integrated circuit through this function to balance the dark counts and the missing counts, for the purpose of improvement for detection accuracy. The average detection accuracy simulated is 98.24%.

KEY WORDS: Avalanche Photon Diode, photon counting, changeable counting bits, hold-off time

目录

摘要 I

Abstract II

第一章 绪论 1

1.1 研究背景与意义 1

1.2 国内外光子计数及其读出电路研究现状及发展趋势 1

1.3 研究内容和技术指标 3

1.3.1 研究内容 3

1.3.2 技术指标 4

1.4 文章组织结构 4

第二章 光子计数读出电路基本原理 6

2.1 单光子雪崩二极管原理 6

2.2 光子计数读出电路系统架构设计 8

2.3 光子计数读出电路系统时序设计 8

2.4 本章小结 10

第三章 光子计数读出电路系统设计 11

3.1 像素阵列模块 11

3.1.1 接口电路 11

3.1.2 计数位数可调部分（计数器和存储器） 12

3.1.3 Hold-off time死区延迟时间调整部分 13

3.1.4 死区时间调整程序模拟 14

3.2 同步模块 15

3.3 本章小结 17

第四章 仿真验证与分析 18

4.1 计数位数可调部分仿真验证 18

4.2 “光子频率-最佳延迟时间”的程序模拟与方程拟合 22

4.3 本章小结 25

第五章 总结与展望 26

致谢 28

参考文献 29

附录 30

绪论

本章概述了光子计数系统和其读出电路的背景、意义、现状和趋势，以及本篇毕业设计的研究内容和文章的组织结构。

研究背景与意义

在微光探测成像技术领域，光子计数式探测技术能够基于单光子雪崩光电二极管APD(Avalanche Photodiode)具有高灵敏度、高信噪比、时间稳定性好等优点而得到迅速发展。单光子计数探测可应用于激光雷达、光谱测量、物质非破坏性分析、放射探测、高能物理、量子密钥等诸多领域，然而随着其在这些领域的不断拓展深入，对高灵敏探测器和感应信号的检测与量化等前段信号处理提出了更高的要求。

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